Timing signals are widely used in timing and frequency generators and especially for test equipments. The increasing demand and capacity of memory chips and ASICs requires fast and accurate testing equipments. Frequency generators with a wide range of frequencies are generally known in the prior art as phase locked loop (PLL) circuits or programmable pre-scalers. The former perform with a high frequency resolution, whereas the latter exhibit higher accuracy and no switching time between different frequency applications.
U.S. Pat. No. 4,263,669 by the present inventor discloses a frequency synthesizer which combines the advantages of phase locked loop (PLL) circuits and programmable prescalers in having a wide frequency range with high accuracy and resolution and no switching time between different frequencies. The generation of a pulse cycle is derived from a specific count of a down counter loadable with a start count when the counting process has reached the zero count. For affecting a higher time resolution of the pulse cycles, the beginning of a count down process is delayed by integer multiples of the count clock. Although the frequency synthesizer is capable of generating even single cycles with a frequency resolution in pico-seconds range, the repetition rate of those cycles is limited by the processing speed of the components.